About Me |
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Completed Masters Degree in Control and Instrumentation from Motilal Nehru National Institute of Technology (MN-NIT) Allahabad, and 10 Years of Teaching Experience. |
Digital System Design,
Controller Design for Switching Converters,
Instrumentation System Design
Sl. No. | Title | Issuer |
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1 | Best paper award for presenting a paper at International conference | ICETET-2013, organized by ITSI, New Delhi on 14th April-2013. |
For LED lighting system the quality of the power is an important issue. For better utilisation and quality the power factor should be unity. Thus LED system must have a PFC circuit before the signal drives the LED. In this paper a single stage bridgeless Single Ended Primary Inductor Converter (SEPIC) for LED driver application is presented. The main feature of proposed converter is that it has only one switch with bridgeless topology. To facilitate the feedback control it is necessary to obtain a linear model of the system by using which the system stability analysis can be performed. Thus the paper also presents the modeling of the proposed converter using state space averaging technique for stability analysis
A Single-Ended Primary Inductor Converter is a DC-DC converter, capable of operating both in step-up or stepdown mode and is widely used in battery-operated applications. There are two possible modes of operation in the SEPIC converter one is the Continuous Conduction Mode and another one is the Discontinuous Conduction Mode. This paper presents modeling of a SEPIC converter operating in Continuous conduction mode(CCM) using the State-Space Averaging technique. The SEPIC converter consists of two inductors and two capacitors so it is a fourth order dc dc converter. Design of a feedback compensator for the fourth order system is quite complex. In this paper, the controller is designed for reduced order model of SEPIC converter by using model order reduction (MOR) technique. First small signal model of SEPIC converter) is obtained by using state space analysis (SSA) which provides fourth order transfer function. Then the Pade approximation technique is used to reduce the fourth order transfer function to second order transfer function. Then the controller is designed for the reduced order model of the SEPIC converter.
Agriculture plays vital role of any nation’s economy and it depends upon the agricultural growth which leads toward the economic prosperity. India is primarily an agricultural country where large percentage of the population depends upon the farming and the storage of grains plays a crucial part in national economy. The seasonality production of grain and its storage are given priority. So, nowadays silos are extensively used in agriculture for grain storage. In the process of storage of grain, temperature and humidity are the major environmental factors which can influence the grain quality. So, it is necessary to monitor and measure the important parameters continuously during grain storage and the status has to be communicated to the manager in real-time which is more challenging. The traditional methods are just limited to simple manual temperature and humidity testing which are not reliable hence there is a need for smart grain management system with automation which can also avoid hidden security risks. The real-time monitoring of the grain storage system is designed based on Arduino and using GSM module which improves the level of grain storage and reduces the grain losses during storage procedure and reduces manpower and labor intensity.
Nowadays, bridgeless circuits are gaining more popularity due to less harmonic distortion of current in the input due to absence of input diode bridge circuit. A SEPIC PFC converter is capable of operating in both step-up and step-down mode. In this paper modelling of a bridgeless SEPIC PFC converter operating in Continuous Conduction Mode is presented. In the proposed converter due to presence of complex poles and zeros it makes the system unstable and leads to difficult design of stable control. Thus the paper also presens the modified circuit and their modelling using suitable damping network for the achievement of stability. Simulation results are presented to verify the accuracy of the model
A fairly regulated output voltage can be obtained with a low power factor corrector circuit. When the line voltage is a sinusoidal line voltage, the converter must draw a current which is sinusoidal. To achieve it, a suitable reference sinusoidal signal is generally needed and the control objective is to force the input current to match with the reference current. In the earlier proposed work of the single switch, SEPIC PFC rectifier [1] does not use any controller.
Thus, feedback control is usually used with the converter circuit to achieve regulated output voltage, input current, i.e., input current waveform can be shaped typically by means of pulse width modulation (PWM). Basically, feedback controls are used for regulating the output voltage of the converter and for shaping of input current waveform which distorted due to injection of harmonics and nonlinear loads. This paper reviews different control techniques used for PFC. The paper focuses on design and analysis of controller for the PFC rectifier using average current mode controller.
The Video Graphic Array is a standard interface VGA which is used in different application such as surveillance systems, ATM machines, and video conferencing. VGA provides connection to a system with a monitor. The paper presents displaying of a VGA monitor with the help of Xilinx
platform using Verilog programming. In this work VGA timing is generated whose position and even size can be changed. The Code is synthesized and netlist is generated to obtain the bit stream for FPGA implementation. VGA video signal contains 5 active signals. H_sync, V_sync, R, G, B. By changing the three RGB signals all other colors are produced. RTL of the design is obtained and simulation results are presented to validate the design.
The processors are basically categorized into two components such as data path which
contains all the required hardware to perform different operations and the second one is controller unit which determines the datapath operations. The paper presents the design and synthesis of a data path controller using different approaches. The work is demonstrated through design 4 bit counter consisting of datapath and control unit. The presented work is simulated using Xilinx ISE Design suite using Verilog programming. Top module and RTL of the system is obtained through synthesis process. Testbench code has been implemented to the design for validation of the system.
Combinational multipliers operate fast, but require a significant amount of silicon area. As area is an important consideration, it can be reduced at the expense of performance by scheduling the sub-operations of the multiplier to execute in successive clock cycles. Sequential multipliers are compact, require fewer adders, and are amenable to pipelining. The area required by combinational multipliers grows geometrically with the word length, but the area of a sequential multiplier does not grow significantly with word length and that the number of clock cycles required completing a multiplication also grows in a linear manner, rather than exponentially, with the word length. The paper presents design and synthesis of sequential multiplier based on state transition graph (STG) controller. The proposed multiplier is designed and synthesized using Verilog programming in Xilinx ISE. Simulation results and RTL diagrams are presented to
validate the sequential multiplier operations.
The single phase high efficient ac to dc PWM bridgeless CUK converter using soft
switching method is being presented here. The proposed converter offers low conduction
loss and less input current harmonics because of the absence bridge input diode and also uses two semiconductor switches are available in the current flowing in the path during each of the switching cycle unlike other types of conventional CUK converters. The efficiency can be improved of the proposed converter which uses soft switching technique by using the help of auxiliary circuit. The output voltage can be regulated by using output voltage regulating control which improves the efficiency. As the input current harmonics is less so the power factor is almost equal to one. The circuit arrangement, performance, design principle and simulated output results are introduced here.
Robotics application in surface cleaning are getting more attention now a days. This paper presents controller design and implementation of a surface cleaning robot. The robot presented is designed on the RF principle. The design consists of an 8051 microcontroller which is the main building block of the design. The control system developed in this work able to control the movement of the robot in forward, backward and as well as turn. The proposed design is simulated in proteus software and a prototype is developed to demonstrate the working of the model.
Book Chapter published under Book Titled "Project Management and Smart Electrical System"
Book Chapter published under Book Titled "Project Management and Smart Electrical System"